Smart shutdown function

STIPN2M50T-H

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DocID028651 Rev 5

Figure 10: Smart shutdown timing waveforms

Please refer to Table 13: "Sense comparator characteristics (VCC = 15 V unless otherwise

specified)" for internal propagation delay time details.

SHUTDOW N CIRCUIT

An approximation of the disable time is given by:

H IN /LIN

H VG/LVG

open-drain gate

(internal)

com p Vref

C P+

PROTECTION

the driver outputs are set to the SD state as soon as the com parator

triggers even if the SD signal hasn’t reached the lowest input threshold

disable tim e

SD /OD

GIPG080920140931FSR

T/SD/OD

V

SMART SD

LOGIC

T/SD/ O D

RPD_SD

C SD

R SD

Vbias

NTC

RON_OD