Application information

HVLED001A

22/30

DocID029000 Rev 2

7.2.4

Primary side regulation feature

The ZCD pin is also used as input of the PSR error amplifier (E/A). The reference voltage of

this loop is internally fixed to VREF,PSR and applied to the non-inverting input of the E/A.

The output of such error amplifier is connected to the FB pin where the relevant

compensation network has to be connected.

In a flyback or buck-boost topology the output voltage can be read from the primary side

using an auxiliary winding of the power magnetic: in this case the output voltage is obtained

using Equation 2:

Equation 2

The internal small signal model of the PSR E/A is obtained by considering the voltage gain

Figure 10:

Figure 10. PSR E/A small signal model

7.2.5

Burst mode operation

As soon as the FB pin drops below Vbm the burst mode operating mode is entered. The

switching activity is temporarily interrupted until the FB voltage returns above the Vbm

value. An internal hysteresis improves the noise rejection of this feature. The FB biasing

current follows the same rules as in the normal operation; therefore the burst mode

operation is either defined by a secondary side error amplifier when an optocoupler is used

or by the internal error amplifier if the PSR operation is on.

During the burst mode, the output voltage value is refreshed every millisecond by means of

the generation of four switching pulses separated by the ZCD voltage's falling edge. The

TBLANK,min interval is also present between each pulse.

A minimum power delivery is associated with the burst mode. A small preloading device

(resistor or clamping Zener) should be placed on the output port to prevent the output

voltage runaway when no load is connected to the output port.