TNETV2664FIBZWT datasheet(218/249 Pages) TI1

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RMREFCLK

RMRXD1−RMRXD0,

RMCRSDV, RMRXER (Inputs)

RMREFCLK

RMTXD1−RMTXD0,

RMTXEN (Outputs)

TMS320C6424

SPRS347D – MARCH 2007 – REVISED DECEMBER 2009

www.ti.com

Table 6-64. Timing Requirements for EMAC RMII Receive 10/100 Mbit/s(1) (see Figure 6-39)

-7/-6/-5/-4

-L/-Q6/-Q5/-

NO.

UNIT

MIN

MAX

tsu(RMRXD-REFCLKH)

Setup time, receive selected signals valid before RMREFCLK high

th(REFCLKH-RMRXD)

Hold time, receive selected signals valid after RMREFCLK high

(1)

Receive selected signals include: RMRXD1-RMRXD0, RMCRSDV, and RMRXER.

Figure 6-39. EMAC Receive Interface Timing [RMII Operation]

Table 6-65. Switching Characteristics Over Recommended Operating Conditions for EMAC RMII Transmit

10/100 Mbit/s(1) (see Figure 6-40)

-7/-6/-5/-4

-L/-Q6/-Q5/-Q4

NO.

UNIT

MIN

MAX

td(REFCLKH-MTXD)

Delay time, RMREFCLK high to transmit selected signals valid

2.2

15.5

(1)

Transmit selected signals include: RMTXD1-RMTXD0, and RMTXEN.

Figure 6-40. EMAC Transmit Interface Timing [RMII Operation]

218

Peripheral Information and Electrical Specifications

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Product Folder Link(s): TMS320C6424

TNETV2664FIBZWT 데이터시트(PDF) 218 Page - Texas Instruments

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