TNETV2664FIBZWT datasheet(235/249 Pages) TI1

235 / 249 page

TMS320C6424

www.ti.com

SPRS347D – MARCH 2007 – REVISED DECEMBER 2009

6.21.1

GPIO Peripheral Register Description(s)

Table 6-88. GPIO Registers

HEX ADDRESS RANGE

ACRONYM

0x01C6 7000

PID

Peripheral Identification Register

0x01C6 7004

Reserved

0x01C6 7008

BINTEN

GPIO interrupt per-bank enable

GPIO Banks 0 and 1

0x01C6 700C

Reserved

0x01C6 7010

DIR01

GPIO Banks 0 and 1 Direction Register (GP[0:31])

0x01C6 7014

OUT_DATA01

GPIO Banks 0 and 1 Output Data Register (GP[0:31])

0x01C6 7018

SET_DATA01

GPIO Banks 0 and 1 Set Data Register (GP[0:31])

0x01C6 701C

CLR_DATA01

GPIO Banks 0 and 1 Clear data for banks 0 and 1 (GP[0:31])

0x01C6 7020

IN_DATA01

GPIO Banks 0 and 1 Input Data Register (GP[0:31])

0x01C6 7024

SET_RIS_TRIG01

GPIO Banks 0 and 1 Set Rising Edge Interrupt Register (GP[0:31])

0x01C6 7028

CLR_RIS_TRIG01

GPIO Banks 0 and 1 Clear Rising Edge Interrupt Register (GP[0:31])

0x01C6 702C

SET_FAL_TRIG01

GPIO Banks 0 and 1 Set Falling Edge Interrupt Register (GP[0:31])

0x01C6 7030

CLR_FAL_TRIG01

GPIO Banks 0 and 1 Clear Falling Edge Interrupt Register (GP[0:31])

0x01C6 7034

INSTAT01

GPIO Banks 0 and 1 Interrupt Status Register (GP[0:31])

GPIO Banks 2 and 3

0x01C6 7038

DIR23

GPIO Banks 2 and 3 Direction Register (GP[32:63])

0x01C6 703C

OUT_DATA23

GPIO Banks 2 and 3 Output Data Register (GP[32:63])

0x01C6 7040

SET_DATA23

GPIO Banks 2 and 3 Set Data Register (GP[32:63])

0x01C6 7044

CLR_DATA23

GPIO Banks 2 and 3 Clear Data Register (GP[32:63])

0x01C6 7048

IN_DATA23

GPIO Banks 2 and 3 Input Data Register (GP[32:63])

0x01C6 704C

SET_RIS_TRIG23

GPIO Banks 2 and 3 Set Rising Edge Interrupt Register (GP[32:63])

0x01C6 7050

CLR_RIS_TRIG23

GPIO Banks 2 and 3 Clear Rising Edge Interrupt Register (GP[32:63])

0x01C6 7054

SET_FAL_TRIG23

GPIO Banks 2 and 3 Set Falling Edge Interrupt Register (GP[32:63])

0x01C6 7058

CLR_FAL_TRIG23

GPIO Banks 2 and 3 Clear Falling Edge Interrupt Register (GP[32:63])

0x01C6 705C

INSTAT23

GPIO Banks 2 and 3 Interrupt Status Register (GP[32:63])

GPIO Bank 4 and 5

0x01C6 7060

DIR45

GPIO Bank 4 and 5 Direction Register (GP[64:95])

0x01C6 7064

OUT_DATA45

GPIO Bank 4 and 5 Output Data Register (GP[64:95])

0x01C6 7068

SET_DATA45

GPIO Bank 4 and 5 Set Data Register (GP[64:95])

0x01C6 706C

CLR_DATA45

GPIO Bank 4 and 5 Clear Data Register (GP[64:95])

0x01C6 7070

IN_DATA45

GPIO Bank 4 and 5 Input Data Register (GP[64:95])

0x01C6 7074

SET_RIS_TRIG45

GPIO Bank 4 and 5 Set Rising Edge Interrupt Register (GP[64:95])

0x01C6 7078

CLR_RIS_TRIG45

GPIO Bank 4 and 5 Clear Rising Edge Interrupt Register (GP[64:95])

0x01C6 707C

SET_FAL_TRIG45

GPIO Bank 4 and 5 Set Falling Edge Interrupt Register (GP[64:95])

0x01C6 7080

CLR_FAL_TRIG45

GPIO Bank 4 and 5 Clear Falling Edge Interrupt Register (GP[64:95])

0x01C6 7084

INSTAT45

GPIO Bank 4 and 5 Interrupt Status Register (GP[64:95])

GPIO Bank 6

0x01C6 7088

DIR6

GPIO Bank 6 Direction Register (GP[96:110])

0x01C6 708C

OUT_DATA6

GPIO Bank 6 Output Data Register (GP[96:110])

0x01C6 7090

SET_DATA6

GPIO Bank 6 Set Data Register (GP[96:110])

0x01C6 7094

CLR_DATA6

GPIO Bank 6 Clear Data Register (GP[96:110])

0x01C6 7098

IN_DATA6

GPIO Bank 6 Input Data Register (GP[96:110])

0x01C6 709C

SET_RIS_TRIG6

GPIO Bank 6 Set Rising Edge Interrupt Register (GP[96:110])

0x01C6 70A0

CLR_RIS_TRIG6

GPIO Bank 6 Clear Rising Edge Interrupt Register (GP[96:110])

Peripheral Information and Electrical Specifications

235

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