TNETV2685FIBZUT7 datasheet(5/191 Pages) TI1

5 / 191 page

TMS320DM647

TMS320DM648

www.ti.com

SPRS372H – MAY 2007 – REVISED APRIL 2012

6.2

Recommended Clock and Control Signal Transition

Features

................................................... 1

Behavior

............................................ 59

1.1

Applications

.......................................... 2

6.3

Power Supplies

..................................... 59

1.2

Trademarks

.......................................... 2

6.4

PLL1 Controller

..................................... 65

1.3

Description

........................................... 2

6.5

PLL2 Controller

..................................... 69

1.4

Functional Block Diagram

........................... 4

6.6

Enhanced Direct Memory Access (EDMA3)

Revision History

.............................................. 6

Controller

........................................... 71

Device Overview

........................................ 7

6.7

Reset Controller

.................................... 84

2.1

Device Characteristics

............................... 7

6.8

Interrupts

........................................... 96

2.2

CPU (DSP Core) Description

........................ 8

6.9

DDR2 Memory Controller

......................... 100

2.3

C64x+ CPU

......................................... 11

6.10

External Memory Interface A (EMIFA)

............ 111

2.4

Memory Map Summary

............................ 12

6.11

Video Port

......................................... 118

2.5

Pin Assignments

.................................... 16

6.12

VCXO Interpolated Control (VIC)

................. 126

2.6

Terminal Functions

................................. 20

6.13

Universal Asynchronous Receiver/Transmitter

2.7

Device Support

..................................... 34

(UART)

............................................ 128

Device Configuration

................................. 38

6.14

Serial Peripheral Interface Port (SPI)

............. 130

3.1

System Module Registers

.......................... 38

6.15

Inter-Integrated Circuit (I2C)

...................... 134

3.2

Bootmode Registers

................................ 39

6.16

Host-Port Interface (HPI) Peripheral

.............. 138

3.3

Pullup/Pulldown Resistors

.......................... 49

6.17

Peripheral Component Interconnect (PCI)

........ 149

System Interconnect

.................................. 50

6.18

Multichannel Audio Serial Port (McASP)

.......... 154

4.1

Internal Buses, Bridges, and Switch Fabrics

....... 50

6.19

3-Port Ethernet Switch Subsystem (3PSW)

....... 162

4.2

Data Switch Fabric Connections

................... 50

6.20

Management Data Input/Output (MDIO)

.......... 172

4.3

Configuration Switch Fabric

........................ 52

6.21

Timers

............................................. 173

Device Operating Conditions

....................... 54

6.22

VLYNQ Peripheral

................................. 175

5.1

Absolute Maximum Ratings

........................ 54

6.23

General-Purpose Input/Output (GPIO)

............ 178

5.2

Recommended Operating Conditions

.............. 55

6.24

Emulation Features and Capability

............... 180

5.3

Electrical Characteristics

........................... 56

6.25

IEEE 1149.1 JTAG

................................ 181

Peripheral Information and Electrical

Mechanical Data

...................................... 183

Specifications

.......................................... 57

7.1

Thermal Data for ZUT

............................. 183

6.1

Parameter Information

.............................. 57

7.2

Packaging Information

............................ 184

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