DocID025099 Rev 2

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STEF033

Typical application

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5

Typical application

Figure 3. Application circuit, STEF033 and STEF033A (DFN10 package)

Figure 4. Application circuit with Kelvin current sensing, STEF033J and STEF033JA

(Flip Chip 9 bump package)

5.1

Operating modes

5.1.1

Turn-on

When the input voltage is applied, the Enable/Fault pin goes up to the high state, enabling

the internal control circuitry.

After an initial delay time of typically 500 ms, the output voltage is supplied with a slope

defined by the internal dv/dt circuitry. If no additional capacitor is connected to dv/dt pin, the

total time from the Enable signal going high and the output voltage reaching the nominal

value is around 1.6 ms (refer to Figure 5, and Figure 15).