VIPER0PLDTR datasheet(29/36 Pages) STMICROELECTRONICS

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VIPer0P

Application information

DocID028423 Rev 2

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Table 10: Input power consumption

VIN

PIN in ZPM [mW]

PIN @ no-load [mW]

115 VAC

0.8

6.5

230 VAC

3.3

9.0

Figure 40: PIN versus VIN in ZPM and no load

Figure 41: PIN versus VIN in light load

5.4

Layout guidelines and design recommendations

A proper printed circuit board layout is essential for correct operation of any switch-mode

converter and this is true for the VIPer0P as well. The main reasons to have a proper PCB

layout are:



Provide clean signals to the IC, ensuring good immunity against external noises and

switching noises



Reduce the electromagnetic interferences, both radiated and conducted, to pass more

easily the EMC

When designing a SMPS using VIPer0P, the following basic rules should be considered:



Separating signal from power tracks: generally, traces carrying signal currents

should run far from others carrying pulsed currents or with quickly swinging voltages.

Signal ground traces should be connected to the IC signal ground, SGND, using a

GIPD160720151022MT

115

150

180

230

265

PIN [ mW]

IN [VAC]

no load

ZPM

GIPD160720151023MT

100

150

200

250

300

350

400

115

150

180

230

265

PIN [ mW]

IN [VAC]

POUT = 250 mW

POUT = 50 mW

POUT = 25 mW

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