L6758A datasheet(23/42 Pages) STMICROELECTRONICS

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L6758A

Output voltage positioning

into a voltage that, with a proper gain, is used to adjust the duty cycle whose dominant value

is set by the voltage error amplifier in order to equalize the current carried by each phase.

6.3

Multi-phase section: defining load-line

The L6758A introduces a dependence of the output voltage on the load current recovering

part of the drop due to the output capacitor ESR in the load transient. Introducing a

dependence of the output voltage on the load current, a static error, proportional to the

output current, causes the output voltage to vary according to the sensed current.

Figure 6 shows the current sense circuit used to implement the load-line. The current

flowing across the inductor(s) is read through the R-C filter across the CSxP and CSxN pins.

programs a trans-conductance gain and generates a current I

CSx

proportional to the

current of the phase. The sum of the I

CSx

current is then sourced by the FB pin (I

DROOP

gives the final gain to program the desired load-line slope (

Figure 5).

Time constant matching between the inductor (L / DCR) and the current reading filter (RC) is

required to implement a real equivalent output impedance of the system and so avoiding

over and/or undershoot of the output voltage as a consequence of a load transient. The

output voltage characteristic vs. load current is then given by:

Equation 3

where R

is the resulting load-line resistance implemented by the multi-phase section.

The R

resistor can be then designed according to the R

specifications as follows:

Equation 4

6.4

Multi-phase section: IMON information

IMON is the analog information related to the current delivered by the VR which has a

voltage digitized for VR12 current reporting. The pin sources a copy of the droop current:

Equation 5

See

Section 6.2 for details about current reading.

OU T

VI D

DR OOP

⋅

–

VI D

DC R

------------- I

OU T

⋅⋅

–

VID

OUT

⋅

–

DC R

-------------

⋅

MON

DR OOP

DC R

------------- I

OU T

⋅

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