LNBH26L datasheet(9/28 Pages) STMICROELECTRONICS

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LNBH26L

Pin configuration

Doc ID 022876 Rev 1

9/28

Pin configuration

Figure 5.

Pin connections (top view)

AM10483v1

GND

DSQIN-B

DSQIN-A

VUP-A

VCC

PGND

GND

LX- B

LX- A

SDA

ISEL

GND

VUP-B

GND

VOUT-B

VOUT-A

GND

BYP

GND

ADDR

GND

SCL

Table 2.

Pin description

Pin n°

Symbol

Name

Pin function

LX-A

N-Mos drain

Channel A, integrated N-channel Power MOSFET drain.

P-GND

Power ground

DC-DC converter power ground. To be connected directly to the

Epad.

LX-B

N-Mos drain

Channel B, integrated N-channel Power MOSFET drain.

ADDR

Address setting

Two I²C bus addresses available by setting the Address pin

level voltage. See the Address pin characteristics table.

SCL

Serial clock

Clock from I²C bus.

SDA

Serial data

Bi-directional data from/to I²C bus.

ISEL

Current selection for

both channel A and

The resistor “RSEL” connected between ISEL and GND defines

the linear regulator current limit threshold. Refer to “output

current limit selection”

Section 2. The RSEL resistor defines the

same current limit both for channels A and B.

1, 2, 12, 13,

15, 18, 19, 23

GND

Analog ground

Analog circuits ground. To be connected directly to the Epad.

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