LNBH26L

I²C interface protocol

Doc ID 022876 Rev 1

15/28

7

I²C interface protocol

7.1

Write mode transmission

The LNBH26L interface protocol is made up of:

●

a START condition (S)

●

a chip address byte with the LSb bit R/W = 0

●

a register address (internal address of the first register to be accessed)

●

a sequence of data (byte to write in the addressed internal register + acknowledge)

●

the following bytes, if any, to be written in successive internal registers

●

a STOP condition (P), the transfer lasts until a stop bit is encountered

●

the LNBH26L, as slave, acknowledges every byte transfer.

Figure 10.

ACK = Acknowledge

S = Start

P = Stop

R/W = 1/0, read/write bit

X = 0/1, set the values to select the chip address (see

Table 15 for pin selection) and to

select the register address (see

Table 6 to Table 11).

a.

The writing procedure can start from any register address by simply setting the X values in the register address

byte (after the chip address). It can be also stopped from the master by sending a STOP condition after any

acknowledge bit.

AM10485v1

S

0

0010

0

X

00000

X X X

MSB

LSB

CHIP ADDRESS

MSB

LSB

REGISTER ADDRESS

P

MSB

LSB

MSB

LSB

MSB

LSB

MSB

LSB

DATA 1

Add=0x2

DATA 2

Add=0x3

DATA 3

Add=0x4

DATA 4

Add=0x5