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ST7LITE49K2 데이터시트(PDF) 20 Page - STMicroelectronics |
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ST7LITE49K2 데이터시트(HTML) 20 Page - STMicroelectronics |
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20 / 245 page ![]() Pin description ST7LITE49K2 20/245 26 30 PC4/LTIC/ COMPINB- I/O CT x ei2 xx Port C4 LTIC/Analog Comparator External Reference Input B 27 31 PC5/COMPINB+/ BREAK2 I/O CT x xx Port C5 Analog Comparator Input B/ External break 2 28 32 PC6/COMPINA+ I/O CT x ei2 xx Port C6 Analog Comparator Input A 29 1 PC7/BREAK1/ COMPOUTA I/O CT x xx Port C7 BREAK1/Ana log Comparator Output A 30 2 PA0 /COMPINA- /OCMP1_A I/O CT x ei0 xx Port A0 Analog comparator external reference Input A/ Timer A Output Compare 1 31 3 PA1(HS)/ATIC I/O CT HS x xx Port A1 (HS) ATIC 32 4 PA2(HS)/ATPWM0 I/O CT HS x xx Port A2 (HS) ATPWM0 1. In the open-drain output column, T defines a true open-drain I/O (P-Buffer and protection diode to VDD are not implemented).0 2. It is mandatory to connect all available VDD and VDDA pins to the supply voltage and all VSS and VSSA pins to ground. Table 2. ST7LITE49K2 device pin description Pin number Pin name Level Port/control Main function (after reset) Alternate function Input Output |
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