ST7LITE49K2 datasheet(200/245 Pages) STMICROELECTRONICS

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Electrical characteristics

ST7LITE49K2

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13.4

Supply current characteristics

The following current consumption specified for the ST7 functional operating modes over

temperature range does not take into account the clock source current consumption. To get

the total device consumption, the two current values must be added (except for Halt mode

for which the clock is stopped).

13.4.1

Supply current

TA = -40 to +125 °C unless otherwise specified.

Table 78.

Supply current characteristics

Symbol

Parameter

Conditions

Typ

Max

Unit

IDD

Supply current in Run mode(1)

fCPU = 4 MHz

2.8

4.5(2)

fCPU = 8 MHz

5.5

9.5

Supply current in Wait mode(3)

fCPU = 4 MHz

1.5

2.3(2)

fCPU = 8 MHz

2.7

4.5

Supply current in Slow mode(4)

fCPU/32 = 250 kHz

600

900

μA

Supply current in Slow-Wait mode(5)

fCPU/32 = 250 kHz

500

800

Supply current in AWUFH mode(6)(7)

816

Supply current in Active-halt mode

120

200

Supply current in Halt mode(8)

TA = 85 °C

0.2

1 (2)

TA = 125 °C

1.5

IDD

Supply current in Run mode(1)

fCPU = 4 MHz

1.5

2.5(2)

Supply current in Wait mode(3)

fCPU = 4 MHz

0.8

1.2(2)

Supply current in Slow mode(4)

fCPU/32 = 250 kHz

350

550(2)

μA

Supply current in Slow-Wait mode(5)

fCPU/32 = 250 kHz

280

450(2)

Supply current in AWUFH mode(6)(7)

58(2)

Supply current in Active-halt mode

100(2)

Supply current in Halt mode(8)

TA = 85 °C

0.1

0.7(2)

TA = 125 °C

1.2

3(2)

CPU running with memory access, all I/O pins in input mode with a static value at VDD or VSS (no load), all peripherals in

reset state; clock input (CLKIN) driven by external square wave, LVD disabled.

Data based on characterization, not tested in production.

All I/O pins in input mode with a static value at VDD or VSS (no load), all peripherals in reset state; clock input (CLKIN)

driven by external square wave, LVD disabled.

Slow mode selected with fCPU based on fOSC divided by 32. All I/O pins in input mode with a static value at VDD or VSS (no

load), all peripherals in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.

Slow-Wait mode selected with fCPU based on fOSC divided by 32. All I/O pins in input mode with a static value at VDD or

VSS (no load), all peripherals in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.

All I/O pins in input mode with a static value at VDD or VSS (no load). Data tested in production at VDD max. and fCPU max.

This consumption refers to the Halt period only and not the associated run period which is software dependent.

All I/O pins in output mode with a static value at VSS (no load), LVD disabled. Data based on characterization results,

tested in production at VDD max and fCPU max.

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