ST72361AR4-Auto datasheet(253/279 Pages) STMICROELECTRONICS

253 / 279 page

ST72361xx-Auto

Electrical characteristics

Doc ID 12468 Rev 3

253/279

Figure 119. RAIN max vs fADC with CAIN = 0pF

CPARASITIC represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus

the pad capacitance (3pF). A high CPARASITIC value will downgrade conversion accuracy. To remedy this,

fADC should be reduced.

Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than

10k

). Data based on characterization results, not tested in production.

Figure 120. Recommended CAIN/RAIN values

Figure 143 shows that depending on the input signal variation (fAIN), CAIN can be increased for stabilization

time and reduced to allow the use of a larger serial resistor (RAIN). It is valid for all fADC frequencies 

4MHz.

Figure 121. Typical application with ADC

Data based on characterization results, not tested in production.

When VDDA and VSSA pins are not available on the pinout, the ADC refers to VDD and VSS.

010

CPARASITIC (pF)

4 MHz

2 MHz

1 MHz

0.1

100

1000

0.01

0.1

fAIN(KHz)

Cain 10 nF

Cain 22 nF

Cain 47 nF

AINx

ST72XXX

VDD

±1µA

0.6V

CADC

6pF

VAIN

RAIN

10-Bit A/D

Conversion

max

CAIN

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