ST72561J4-Auto datasheet(249/324 Pages) STMICROELECTRONICS

249 / 324 page

ST72561-Auto

beCAN controller (beCAN)

Doc ID 12370 Rev 8

249/324

Cleared by hardware when the mailbox becomes empty.

Setting this bit has no effect when the mailbox is not pending for transmission.

Bit 0 = TXRQ Transmit Mailbox Request

Read/ set

Set by software to request the transmission for the corresponding mailbox.

Cleared by hardware when the mailbox becomes empty.

Note:

This register is implemented only in transmit mailboxes. In receive mailboxes, the MFMI

Mailbox filter match index (MFMI)

This register is read only.

Reset value: 0000 0000 (00h)

Bits 7:0 = FMI[7:0] Filter Match Index

This register contains the index of the filter the message stored in the mailbox passed

through. For more details on identifier filtering please refer to Identifier filtering - Filter match

index paragraph.

Note:

This register is implemented only in receive mailboxes. In transmit mailboxes, the MCSR

Mailbox identifier registers (MIDR[3:0])

Read/ write

Reset value: Undefined

MIDR0

Bit 7 = Reserved. Forced to 0 by hardware.

Bit 6 = IDE Extended Identifier

This bit defines the identifier type of message in the mailbox.

0: standard identifier.

1: extended identifier.

Bit 5 = RTR Remote Transmission Request

0: data frame

1: remote frame

Bits 4:0 = STID[10:6] Standard Identifier

5 most significant bits of the standard part of the identifier.

FMI7

FMI6

FMI5

FMI4

FMI3

FMI2

FMI1

FMI0

IDE

RTR

STID10

STID9

STID8

STID7

STID6

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