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ST72561AR7-Auto 데이터시트(PDF) 295 Page - STMicroelectronics

부품명 ST72561AR7-Auto
상세설명  Clock, reset and supply management
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제조업체  STMICROELECTRONICS [STMicroelectronics]
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ST72561AR7-Auto 데이터시트(HTML) 295 Page - STMicroelectronics

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ST72561-Auto
Electrical characteristics
Doc ID 12370 Rev 8
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20.12
Communication interface characteristics
20.12.1
SPI - serial peripheral interface
Subject to general operating conditions for VDD, fOSC, and TA unless otherwise specified.
Refer to I/O port characteristics for more details on the input/output alternate function
characteristics (SS, SCK, MOSI, MISO).
Table 120.
SPI characteristics
Symbol
Parameter
Conditions
Min
Max
Unit
fSCK =1 /tc(SCK) SPI clock frequency
Master, fCPU = 8 MHz
fCPU / 128 = 0.0625 fCPU /4 =2
MHz
Slave, fCPU =8 MHz
0
fCPU /2 =4
tr(SCK)
SPI clock rise and fall
time
See I/O port pin description
tf(SCK)
tsu(SS)
(1)
SS setup time(2)
Slave
(4 x TCPU)+ 50
ns
th(SS)
(1)
SS hold time
120
tw(SCKH)
(1)
SCK high and low time
Master
100
tw(SCKL)
(1)
Slave
90
tsu(MI)
(1)
Data input setup time
Master
100
tsu(SI)
(1)
Slave
th(MI)
(1)
Data input hold time
Master
th(SI)
(1)
Slave
ta(SO)
(1)
Data output access time
Slave
0
120
tdis(SO)
(1)
Data output disable time
240
tv(SO)
(1)
Data output valid time
Slave (after enable edge)
90
th(SO)
(1)
Data output hold time
0
tv(MO)
(1)
Data output valid time
Master (after enable
edge)
120
th(MO)
(1)
Data output hold time
0
1.
Data based on design simulation and/or characterization results, not tested in production.
2.
Depends on fCPU. For example, if fCPU = 8 MHz, then TCPU =1/fCPU = 125ns and tsu(SS) = 550ns.



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