STM32F303C6 datasheet(96/115 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32F303x6/x8

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DocID025083 Rev 5

Figure 30. 12-bit buffered /non-buffered DAC

1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external

loads directly without the use of an external operational amplifier. The buffer can be bypassed by

configuring the BOFFx bit in the DAC_CR register.

6.3.20

Comparator characteristics

Table 67. Comparator characteristics(1)

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

VDDA

Analog supply voltage

3.6

VIN

Comparator input voltage

range

-0

VDDA

VBG

Scaler input voltage

VREFINIT

VSC

Scaler offset voltage

±5

±10

tS_SC

VREFINT scaler startup time

from power down

First VREFINT scaler activation

after device power on

1(2)

Next activations

0.2

tSTART

Comparator startup time

VDDA ≥ 2.7 V

µs

VDDA < 2.7 V

Propagation delay for

200 mV step with 100 mV

overdrive

VDDA ≥ 2.7 V

VDDA < 2.7 V

Propagation delay for full

range step with 100 mV

overdrive

VDDA ≥ 2.7 V

VDDA < 2.7 V

VOFFSET

Comparator offset error

VDDA ≥ 2.7 V

±5

±10

VDDA < 2.7 V

±25

TVOFFSET Total offset variation

Full temperature range

IDD(COMP)

COMP current

consumption

400

600

µA

1. Guaranteed by design, not tested in production.

2. For more details and conditions see Figure 31: Maximum VREFINT scaler startup time from power-down.

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