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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STM32L162VE 데이터시트(PDF) 123 Page - STMicroelectronics |
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STM32L162VE 데이터시트(HTML) 123 Page - STMicroelectronics |
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123 / 129 page  DocID025882 Rev 6 123/129 STM32L162xE Package information 128 Marking of engineering samples The following figure gives an example of topside marking orientation versus ball A1 identifier location. Figure 41. WLCSP104, 0.4 mm pitch wafer level chip scale package top view example 1. Parts marked as “ES”, “E” or accompanied by an Engineering Sample notification letter, are not yet qualified and therefore not yet ready to be used in production and any consequences deriving from such usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering samples in production. ST Quality has to be contacted prior to any decision to use these Engineering samples to run qualification activity. Table 69. WLCSP104, 0.4 mm pitch recommended PCB design rules Dimension Recommended values Pitch 0.4 Dpad 260 µm max. (circular) 220 µm recommended Dsm 300 µm min. (for 260 µm diameter pad) PCB pad design Non-solder mask defined via underbump allowed. |
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