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STM32L432KB 데이터시트(PDF) 103 Page - STMicroelectronics |
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STM32L432KB 데이터시트(HTML) 103 Page - STMicroelectronics |
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103 / 149 page ![]() DocID028798 Rev 2 103/149 STM32L432KB STM3L432KC Electrical characteristics 142 All I/Os are CMOS- and TTL-compliant (no software configuration required). Their characteristics cover more than the strict CMOS-technology or TTL parameters. The coverage of these requirements is shown in Figure 17 for standard I/Os, and in Figure 17 for 5 V tolerant I/Os. Figure 17. I/O input characteristics Output driving current The GPIOs (general purpose input/outputs) can sink or source up to ±8 mA, and sink or source up to ± 20 mA (with a relaxed VOL/VOH). 2. Tested in production. 3. Guaranteed by design. 4. Max(VDDXXX) is the maximum value of all the I/O supplies. Refer to Table: Legend/Abbreviations used in the pinout table. 5. All TX_xx IO except FT_u and PC3. 6. This value represents the pad leakage of the IO itself. The total product pad leakage is provided by this formula: ITotal_Ileak_max = 10 µA + [number of IOs where VIN is applied on the pad] ₓ Ilkg(Max). 7. To sustain a voltage higher than MIN(VDD, VDDA, VDDUSB) +0.3 V, the internal Pull-up and Pull-Down resistors must be disabled. 8. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This PMOS/NMOS contribution to the series resistance is minimal (~10% order). |
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