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STM32L432KB 데이터시트(PDF) 44 Page - STMicroelectronics

부품명 STM32L432KB
상세설명  Batch acquisition mode
PDF  149 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
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STM32L432KB 데이터시트(HTML) 44 Page - STMicroelectronics

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Functional overview
STM32L432KB STM3L432KC
44/149
DocID028798 Rev 2
3.32
Quad SPI memory interface (QUADSPI)
The Quad SPI is a specialized communication interface targeting single, dual or quad SPI
flash memories. It can operate in any of the three following modes:
Indirect mode: all the operations are performed using the QUADSPI registers
Status polling mode: the external flash status register is periodically read and an
interrupt can be generated in case of flag setting
Memory-mapped mode: the external Flash is memory mapped and is seen by the
system as if it were an internal memory
Both throughput and capacity can be increased two-fold using dual-flash mode, where two
quad SPI flash memories are accessed simultaneously.
The Quad SPI interface supports:
Three functional modes: indirect, status-polling, and memory-mapped
SDR and DDR support
Fully programmable opcode for both indirect and memory mapped mode
Fully programmable frame format for both indirect and memory mapped mode
Each of the 5 following phases can be configured independently (enable, length,
single/dual/quad communication)
Instruction phase
Address phase
Alternate bytes phase
Dummy cycles phase
Data phase
Integrated FIFO for reception and transmission
8, 16, and 32-bit data accesses are allowed
DMA channel for indirect mode operations
Programmable masking for external flash flag management
Timeout management
Interrupt generation on FIFO threshold, timeout, status match, operation complete, and
access error



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