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AS4C64M8D1 데이터시트(PDF) 9 Page - Alliance Semiconductor Corporation

부품명 AS4C64M8D1
상세설명  Fully synchronous operation
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AS4C64M8D1
Confidential
8
Rev.
2.0
Oct. /2014
 Addressing Mode Select Field (A3)
The Addressing Mode can be one of two modes, either Interleave Mode or Sequential Mode. Both Sequential
Mode and Interleave Mode support burst length of 2, 4 and 8.
Table 6. Addressing Mode
A3
Addressing Mode
0
Sequential
1
Interleave
Burst Definition, Addressing Sequence of Sequential and Interleave Mode
Table 7. Burst Address ordering
Burst Length
Start Address
Sequential
Interleave
A2
A1
A0
2
X
X
0
0, 1
0, 1
X
X
1
1, 0
1, 0
4
X
0
0
0, 1, 2, 3
0, 1, 2, 3
X
0
1
1, 2, 3, 0
1, 0, 3, 2
X
1
0
2, 3, 0, 1
2, 3, 0, 1
X
1
1
3, 0, 1, 2
3, 2, 1, 0
8
0
0
0
0, 1, 2, 3, 4, 5, 6, 7
0, 1, 2, 3, 4, 5, 6, 7
0
0
1
1, 2, 3, 4, 5, 6, 7, 0
1, 0, 3, 2, 5, 4, 7, 6
0
1
0
2, 3, 4, 5, 6, 7, 0, 1
2, 3, 0, 1, 6, 7, 4, 5
0
1
1
3, 4, 5, 6, 7, 0, 1, 2
3, 2, 1, 0, 7, 6, 5, 4
1
0
0
4, 5, 6, 7, 0, 1, 2, 3
4, 5, 6, 7, 0, 1, 2, 3
1
0
1
5, 6, 7, 0, 1, 2, 3, 4
5, 4, 7, 6, 1, 0, 3, 2
1
1
0
6, 7, 0, 1, 2, 3, 4, 5
6, 7, 4, 5, 2, 3, 0, 1
1
1
1
7, 0, 1, 2, 3, 4, 5, 6
7, 6, 5, 4, 3, 2, 1, 0
 CAS Latency Field (A6~A4)
This field specifies the number of clock cycles from the assertion of the Read command to the first read data.
The minimum whole value of CAS Latency depends on the frequency of CK. The minimum whole value
satisfying the following formula must be programmed into this field.
tCAC(min)
 CAS Latency X tCK
Table 8. CAS Latency
A6
A5
A4
CAS Latency
0
0
0
Reserved
0
0
1
Reserved
0
1
0
2 clocks
0
1
1
3 clocks
1
0
0
Reserved
1
0
1
Reserved
1
1
0
2.5 clocks
1
1
1
Reserved
 Test Mode field (A8~A7)
These two bits are used to enter the test mode and must be programmed to "00" in normal operation.
Table 9. Test Mode
A8
A7
Test Mode
0
0
Normal mode
1
0
DLL Reset



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