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M95M01-DF 데이터시트(PDF) 36 Page - STMicroelectronics

부품명 M95M01-DF
상세설명  1-Mbit serial SPI bus EEPROM
PDF  51 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M95M01-DF 데이터시트(HTML) 36 Page - STMicroelectronics

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DC and AC parameters
M95M01-DF M95M01-R
36/51
DocID13264 Rev 14
Table 15. AC characteristics
Test conditions specified in Table 8, Table 9 and Table 10
Symbol Alt.
Parameter
VCC ≥
1.7 V(1)
VCC ≥
1.8 V(2)
VCC ≥
2.5 V(3)
VCC ≥
4.5 V(1)
Unit
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
fC
fSCK Clock frequency
DC
2
DC
5
DC
10
DC
16
MHz
tSLCH tCSS1 S active setup time
150
-
60
-
30
-
20
-
ns
tSHCH tCSS2 S not active setup time
150
-
60
-
30
-
20
-
ns
tSHSL
tCS S Deselect time
200
-
60
-
40
-
25
-
ns
tCHSH
tCSH S active hold time
150
-
60
-
30
-
20
-
ns
tCHSL
-S not active hold time
150
-
60
-
30
-
20
-
ns
tCH(4)
tCLH Clock high time
200
-
90
-
40
-
25
-
ns
tCL(4)
tCLL Clock low time
200
-
90
-
40
-
25
-
ns
tCLCH(5) tRC Clock rise time
-
2
-
2
-
-
-
2
µs
tCHCL(5) tFC Clock fall time
-
2
-
2
-
-
-
2
µs
tDVCH
tDSU Data in setup time
50
-
20
-
10
-
10
-
ns
tCHDX
tDH Data in hold time
50
-
20
-
10
-
10
-
ns
tHHCH
-
Clock low hold time after
HOLD not active
150
-
60
-
30
-
25
-
ns
tHLCH
-
Clock low hold time after
HOLD active
150
-
60
-
30
-
20
-
ns
tCLHL
-
Clock low set-up time before
HOLD active
0-0
-
0-0-
ns
tCLHH
-
Clock low set-up time before
HOLD not active
0-0
-
0-0-
ns
tSHQZ(5) tDIS Output disable time
-
200
-
80
-
40
-
25
ns
tCLQV
tV
Clock low to output valid
-
200
-
80
-
40
-
25
ns
tCLQX
tHO Output hold time
0
-
0
-
0
-
0
-
ns
tQLQH(5) tRO Output rise time
-
200
-
80
-
40
-
25
ns
tQHQL(5) tFO Output fall time
-
200
-
80
-
40
-
25
ns
tHHQV
tLZ HOLD high to output valid
-
200
-
80
-
40
-
25
ns
tHLQZ(5)
tHZ HOLD low to output high-Z
-
200
-
80
-
40
-
25
ns
tW
tWC Write time
-5-5-5-
5
ms
1. For devices identified by process letter K.
2. Previous products (identified with process letter A) were specified with fC(max) = 2 MHz, with the same AC values as
defined in the 1.7 V columns in this table.
3. Previous products (identified with process letter A) were specified with fC(max) = 5 MHz, with the same AC values as
defined in the 1.8 V columns in this table.
4. tCH + tCL must never be less than the shortest possible clock period, 1 / fC(max)
5. Value guaranteed by characterization, not 100% tested in production.



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