STOD03BTPUR datasheet(13/22 Pages) STMICROELECTRONICS

13 / 22 page

STOD03B

Application information

Doc ID 022613 Rev 1

13/22

7.1.2

Input and output capacitor selection

It is recommended to use X5R or X7R low ESR ceramic capacitors as input and output

capacitors in order to filter any disturbance present in the input line and to obtain stable

operation for the two switching converters. A minimum real capacitance value of 6 µF must

be guaranteed for CMID, CO1 and CO2 in all conditions. Considering tolerance, temperature

variation and DC polarization, 2 x 10 µF, 10 V ±10% as CMID, a 10 µF 10V ±10% capacitor

as CO1 and 2 x 10 µF 10 V ±10% as CO2 can be used to achieve the needed 6 µF.

7.2

Recommended PCB layout

The STOD03B is a high frequency power switching device and therefore requires a proper

PCB layout in order to obtain the necessary stability and optimize line/load regulation and

output voltage ripple.

Analog input (VINA) and power input (VINP) must be kept separated and connected together

at the CIN pad only. The input capacitor must be as close as possible to the IC.

In order to minimize ground noise, a common ground node for power ground and a different

one for analog ground must be used. In the recommended layout, the AGND node is placed

close to CREF ground while the PGND node is centered at CIN ground. They are connected

by a separated layer routing on the bottom through vias.

The exposed pad is connected to AGND through vias.

Figure 10.

Top layer and top silk-screen (top view, not to scale)

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