M48T254V datasheet(13/24 Pages) STMICROELECTRONICS

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M48T254V

Data Retention Mode

Data can be read or written only when VCC is

greater than VPFD. When VCC is below VPFD (the

point at which write protection occurs), the clock

registers and the SRAM are blocked from any ac-

cess. When VCC falls below the Battery Switch

Over threshold (VSO), the device is switched from

VCC to battery backup (VBAT). RTC operation and

SRAM data are maintained via battery backup un-

til power is stable. All control, data, and address

signals must be powered down when VCC is pow-

ered down.

The lithium power source is designed to provide

power for RTC activity as well as RTC and RAM

data retention when VCC is absent or unstable.

The capability of this source is sufficient to power

the device continuously for the life of the equip-

ment into which it has been installed. For specifi-

cation purposes, life expectancy is ten (10) years

at 25°C with the internal oscillator running without

VCC. The actual life expectancy will be much long-

er if no battery energy is used (e.g., when VCC is

present).

Figure 11. Power Down/Up Mode AC Waveforms

Table 8. Power Down/Up Trip Points DC Characteristics

Note: 1. Valid for Ambient Operating Temperature: TA = 0 to 70°C; VCC = 3.0 to 3.6V (except where noted).

2. At 25°C, VCC = 0V; the expected tDR is defined as cumulative time in the absence of VCC with the clock oscillator running.

(Requires use of three M4T32-BR12SH SNAPHAT® tops.)

Symbol

Parameter(1)

Min

Max

Unit

tREC

VPFD (max) to CE low

120

VPFD (max) to VPFD (min) VCC Fall Time

300

µs

tFB

VPFD (min) to VSO VCC Fall Time

µs

VPFD (min) to VPFD (max) VCC Rise Time

µs

tPD

CE High to Power-Fail

µs

tDR

(2)

Expected Data Retention Time

Years

tDR

tREC

tPD

tFB

VSO

VCC

VPFD (max)

VPFD (min)

AI05657

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