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STSAM9708 데이터시트(PDF) 23 Page - ATMEL Corporation |
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STSAM9708 데이터시트(HTML) 23 Page - ATMEL Corporation |
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23 / 30 page ![]() 23 ATSAM9708 1772D–DRMSD–01/04 Digital Audio Timing Figure 17. Digital Audio Timing Diagram Figure 18. Digital Audio Frame Format Note: SD_IN[7:0] is always 20 bits. tCW tCW tCLBD tSOD tSOD WS_OUT BCK_OUT SD_IN[7:0] SD_OUT[7:0] Table 16. Digital Audio Timing Parameters Symbol Parameter Min Typ Max Unit t CW BCK_OUT rising to WS_OUT change 8 x t CK- 10 ns t SOD SD_IN[7:0]/SD_OUT[7:0] valid prior/after BCK_OUT rising 8 x t CK - 10 ns t CLBD BCK_OUT cycle time 16 x t CK ns MSB LSB (16 bits) LSB (18 bits) LSB (20 bits) WS_OUT (I2S) BCK_OUT SD_IN[7:0] SD_OUT[7:0] MSB |
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