TS8388BVFS datasheet(36/57 Pages) ATMEL

36 / 57 page

TS8388B

2144C–BDC–04/03

Figure 38. Differential Output: 50

Ω Terminated

Figure 39. Differential Output: Open Loaded

Out of Range Bit

An Out of Range (OR, ORB) bit is provided that goes to logical high state when the input

exceeds the positive full scale or falls below the negative full scale.

When the analog input exceeds the positive full scale, the digital output datas remain at high

logical state, with (OR, ORB) at logical one.

When the analog input falls below the negative full scale, the digital outputs remain at logical

low state, with (OR, ORB) at logical one again.

Gray or Binary

Output Data

Format Select

The TS8388B internal regeneration latches indecision (for inputs very close to latches thresh-

old) may produce errors in the logic encoding circuitry and leading to large amplitude output

errors.

This is due to the fact that the latches are regenerating the internal analog residues into logical

states with a finite voltage gain value (Av) within a given positive amount of time

∆(t):

Av = exp(

∆(t)/τ), with τ the positive feedback regeneration time constant.

The TS8388B has been designed for reducing the probability of occurrence of such errors to

approximately 10-13 (targeted for the TS8388B at 1 GSPS).

1.6V

Ω

11 mA

DVEE

Ω

impedance

Out

OutB

Ω

1.38V/1.05V

10 nF

Differential output:

+0.33V = 0.660V

1.05V/1.38V

Common mode level: -1.2V

(-1.2V below VPLUSD level)

VPLUSD = 2.4V

1.6V

Ω

11 mA

DVEE

Ω

impedance

Out

OutB

1.6V/0.8V

Differential output:

+0.8V = 1.6V

0.8V/1.6V

Common mode level: -1.2V

(-1.2V below VPLUSD level)

VPLUSD = 2.4V

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