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AD9891 데이터시트(PDF) 21 Page - Analog Devices |
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AD9891 데이터시트(HTML) 21 Page - Analog Devices |
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21 / 58 page ![]() REV. A AD9891/AD9895 –21– Table X. Vertical Sequence Alternation Parameters Register Length Range Description VTPALT 1b Enabled/Disabled Enables the Line-by-Line Alternation (1 = Enabled) VxSPTRFIRST 4b Sequence 0–11 SPTR for Vx Output during Each Region 0–4 for FIRST Lines VxINVFIRST 1b High/Low When High, the Polarity of VxSPTRFIRST Is Inverted VxSPTRSECOND 4b Sequence 0–11 SPTR for Vx Output during Each Region 0–4 for SECOND Lines VxINVSECOND 1b High/Low When High, the Polarity of VxSPTRSECOND Is Inverted x is the V-output from 1–4. Vertical Sequence Alternation The AD9891/AD9895 also supports line-by-line alternation of vertical sequences within any region, as shown in Figure 23. Table X summarizes the additional registers used to support differ- ent alternation patterns. To create an alternating vertical pattern, the VxSPTRFIRST and VxSPTRSECOND Registers are pro- grammed with the desired sequences to be alternated. The VTPALT Register must be set HIGH for that region to use alternation. If VTPALT is LOW, then the VxSPTRSECOND Registers will be ignored. Figure 24 shows an example of line- by-line alternation. REGION CHANGE POSTION #2 SINGLE FIELD (1 VD INTERVAL) SECOND LINES FIRST LINES LINE-BY-LINE ALTERNATION NO ALTERNATION REGION CHANGE POSITION #1 ONLY FIRST LINES ARE USED REGION CHANGE POSTION #0 NO ALTERNATION ONLY FIRST LINES ARE USED WHEN THE VTPALT REGISTER IS LOW (NO ALTERNATION), ONLY THE FIRST LINES ARE USED. Figure 23. Use of Line Alteration in Vertical Sequencing V1 V2 USE FIRST V SEQUENCES V3 V4 HD USE SECOND V SEQUENCES USE FIRST V SEQUENCES SEQUENCES MAY BE ALTERNATED WITHIN A REGION BY USING THE SPTRFIRST AND SPTRSECOND REGISTERS. Figure 24. Example of Line Alteration within a Region |
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