DS1963S

4 of 37

64-BIT LASERED ROM

Each DS1963S contains a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family

code. The next 48 bits are a unique serial number. The last 8 bits are a CRC of the first 56 bits.

(See Figure 3). The 1-Wire CRC is generated using a polynomial generator consisting of a shift register

and XOR gates as shown in Figure 4. The polynomial is X

8

+ X

5

+ X

4

+ 1. Additional information about

the Dallas 1-Wire Cyclic Redundancy Check is available in the Book of DS19xx iButton Standards. The

shift register bits are initialized to zero. Then starting with the least significant bit of the family code, one

bit at a time is shifted in. After the 8th bit of the family code has been entered, then the serial number is

entered. After the 48th bit of the serial number has been entered, the shift register contains the CRC

value. Shifting in the 8 bits of CRC should return the shift register to all zeros.

DS1963S BLOCK DIAGRAM Figure 1

CRC16

Generator

256-bit

Scratchpad

Data Memory

8 Pages of

256 bits each

S

Flag and Mode

Register

SHA Function

Memory and

Control Unit

512-bit

Secure Hash

Algorithm

Engine (SHA-1)

PRNG

Counter

R

Data Memory

8 Pages of

256 bits each

8 Write-Cycle

Counters

one for each

Memory Page

8 Write-Cycle

Counters

one for each

Secret

Secrets Memory

2 Pages of

256 bits

storing 8 Secrets

of 64 bits each

DATA

Lid

Contact

1-Wire

Function Control

64-bit

Lasered ROM

Parasite-Powered

Circuitry