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FS6209 데이터시트(PDF) 1 Page - List of Unclassifed Manufacturers |
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FS6209 데이터시트(HTML) 1 Page - List of Unclassifed Manufacturers |
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1 / 6 page ![]() XT February 1999 This document contains information on a preproduction product. Specifications and information herein are subject to change without notice. 2.4.99 )6 'XDO3// 9&;2&ORFN *HQHUDWRU,& 3UHOLPLQDU\ ,QIRUPDWLRQ ,62 1.0 Features • Dual phase-locked loop (PLL) device two output clock frequencies • On-chip tunable voltage-controlled crystal oscillator (VCXO) allows precise system frequency tuning • 3.3V supply voltage • Small circuit board footprint (8-pin 0.150 ″ SOIC) • Custom frequency selections available - contact your local AMI Sales Representative for more information Figure 1: Pin Configuration 1 8 2 3 4 7 6 5 XIN VDD XTUNE VSS VSS CLKB CLKA XOUT 8-pin (0.150 ″) SOIC 2.0 Description The FS6209 is a monolithic CMOS clock generator IC designed to minimize cost and component count in digital video/audio systems. At the core of the FS6209 is circuitry that implements a voltage-controlled crystal oscillator when an external resonator (nominally 13.5MHz) is attached. The VCXO allows device frequencies to be precisely adjusted for use in systems that have frequency matching requirements, such as digital satellite receivers. Two high-resolution phase-locked loops generate two output clocks (CLKA and CLKB) through an array of post- dividers. All frequencies are ratiometrically derived from the VCXO frequency. The locking of all the output fre- quencies together can eliminate unpredictable artifacts in video systems and reduce electromagnetic interference (EMI) due to frequency harmonic stacking. Table 1: Crystal / Output Frequencies DEVICE fXIN (MHz) CLKA (MHz) CLKB (MHz) FS6209-01 13.5 54 22.5792 (+1.12ppm) NOTE: Contact AMI for custom PLL frequencies Figure 2: Block Diagram VCXO FS6209 PLL XOUT XIN CLKB CLKA XTUNE DIVIDER ARRAY PLL |
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