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TS2012EIJT 데이터시트(PDF) 21 Page - STMicroelectronics

부품명 TS2012EIJT
상세설명  Filter-free Flip Chip stereo 2 x 2.5 W class D audio power amplifier
PDF  32 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

TS2012EIJT 데이터시트(HTML) 21 Page - STMicroelectronics

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TS2012EI
Application information
32
4
Application information
4.1
Differential configuration principle
The TS2012EI is a monolithic fully-differential input/output class D power amplifier. The
TS2012EI also includes a common-mode feedback loop that controls the output bias value
to average it at VCC/2 for any DC common mode input voltage. This allows the device to
always have a maximum output voltage swing, and by consequence, maximize the output
power. Moreover, as the load is connected differentially compared with a single-ended
topology, the output is four times higher for the same power supply voltage.
The advantages of a full-differential amplifier are:
high PSRR (power supply rejection ratio),
high common mode noise rejection,
virtually zero pop without additional circuitry, giving a faster start-up time compared to
conventional single-ended input amplifiers,
easier interfacing with differential output audio DACs,
no input coupling capacitors required thanks to the common mode feedback loop.
4.2
Gain settings
In the flat region of the frequency-response curve (no input coupling capacitor or internal
feedback loop + load effect), the differential gain can be set to 6, 12 18, or 24 dB, depending
on the logic level of the G0 and G1 pins, as shown in Table 9.
Note:
Between pins G0, G1 and GND there is an internal 300 k
(+/-20%) resistor. When the pins
are floating, the gain is 6 dB. In full standby (left and right channels OFF), these resistors
are disconnected (HiZ input).
4.3
Common mode feedback loop limitations
As explained previously, the common mode feedback loop allows the output DC bias
voltage to be averaged at VCC/2 for any DC common mode bias input voltage.
Due to the Vic limitation of the input stage (see Table 3: Operating conditions on page 4), the
common mode feedback loop can fulfill its role only within the defined range.
Table 9. Gain settings with G0 and G1 pins
G1
G0
Gain (dB)
Gain (V/V)
006
2
01
12
4
10
18
8
1
1
24
16



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