ACE527H

Low Noise, High PSRR LDORegulator

VER 1.3

12

For DFN1.6x1.6-

6L package, the thermal resistance θ

layer thermal test board. The maximum power dissipation at TA= 25℃ can be calculated as:

Because of the small size of the TSOT23-5 package, it is very important to use a good thermal PC board

layout to maximize the allowable power dissipation. The thermal path for the heat generated by the IC is

from the die to the copper lead frame, through the package (especially the ground lead), to the PCB board

cooper. The PC board copper. The PCB board copper is the heat sink. The footprint copper pads should be

as wide as possible and expand out to larger copper areas to spread and dissipate the heat to the

surrounding ambient. Feed through via to inner or backside copper layer are also useful in improving the

overall thermal performance of the LDO regulator. Other heat sources on the board, not related to the LDO

regulator, must also be considered when designing a PC board layout because they will affect overall

temperature rise and the maximum allowable power dissipation. The following table lists thermal resistance

for several different board sizes and copper areas. All measurements were taken in still air on 3/32" FR-4

board with the device mounted on topside.

Table 1. Measured Thermal Resistance (2-Layer Board)

Copper Area(mm2)

Board Area (mm2)

θ

Top Side

Back Side

2500

2500

2500, 2-Layer

125

1000

2500

2500, 2-Layer

125

225

2500

2500, 2-Layer

130

100

2500

2500, 2-Layer

135

50

2500

2500, 2-Layer

150

Layout Considerations

Careful PCB Layout is necessary for better performance. The following guidelines should be followed for

good PCB layout.



Place the input and output capacitors as close as possible to the IC.





Use a large PCB ground plane for maximum thermal dissipation.