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OPA187 데이터시트(PDF) 5 Page - Texas Instruments

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부품명 OPA187
상세설명  Drift, Low Power, Rail-to-Rail Output 36-V Operational Amplifiers Zero-Drift Series
PDF  35 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
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OPA187 데이터시트(HTML) 5 Page - Texas Instruments

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OPA187, OPA2187, OPA4187
www.ti.com
SBOS807 – DECEMBER 2016
Product Folder Links: OPA187 OPA2187 OPA4187
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails should
be current limited to ±10 mA or less.
(3)
Refer to the Electrical Overstress section for more information.
(4)
Output terminals are diode-clamped to the power-supply rails. Output signals that can swing more than 0.5 V beyond the supply rails
should be current limited to ±55 mA or less.
(5)
Short-circuit to ground, one amplifier per package.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
Voltage
Supply, VS = (V
+) – (V–)
40
V
Signal input pin(2)
Common-mode
(V–) – 0.5
(V+) + 0.5
Differential(3)
±0.5
Signal output pin(4)
(V–) – 0.5
(V+) + 0.5
Current
Signal input pin(2)
–10
10
mA
Signal output pin(4)
–55
55
mA
Output short-circuit(5)
Continuous
Continuous
Continuous
Temperature
Operating, TA
–55
150
°C
Junction, TJ
150
Storage, Tstg
–65
150
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±4000
V
Charged-device model (CDM), per JEDEC specification JESD22-
C101(2)
±1500
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
(V+) – (V–)
Supply voltage
4.5 (±2.25)
36 (±18)
V
TA
Specified temperature
–40
125
°C
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.4 Thermal Information: OPAx187
THERMAL METRIC(1)
OPAx187
UNIT
8 PINS
DGK (VSSOP)
RθJA
Junction-to-ambient thermal resistance
159
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
37
°C/W
RθJB
Junction-to-board thermal resistance
49
°C/W
ψJT
Junction-to-top characterization parameter
1.2
°C/W
ψJB
Junction-to-board characterization parameter
77.1
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
n/a
°C/W



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