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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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HT45F75 데이터시트(PDF) 142 Page - Holtek Semiconductor Inc |
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HT45F75 데이터시트(HTML) 142 Page - Holtek Semiconductor Inc |
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142 / 190 page  Rev. 1.10 1�� De�e��e� 1�� �01� Rev. 1.10 1�3 De�e��e� 1�� �01� HT45F75 Body Fat Scale Flash MCU HT45F75 Body Fat Scale Flash MCU UART Module Interrupt Structure SeveralindividualUARTconditionscangenerateaUARTinterrupt.Whentheseconditionsexist, alowpulsewillbegeneratedtogettheattentionofthemicrocontroller.Theseconditionsarea transmitterdataregisterempty,transmitteridle,receiverdataavailable,receiveroverrun,address detectandanRXpinwake-up.Whenanyoftheseconditionsarecreated,iftheglobalinterrupt enablebit,multi-functioninterruptenablebitanditscorrespondinginterruptcontrolbitareenabled andthestackisnotfull,theprogramwilljumptoitscorrespondinginterruptvectorwhereitcan beservicedbeforereturningtothemainprogram.Fouroftheseconditionshavethecorresponding USRregisterflagswhichwillgenerateaUARTinterruptifitsassociatedinterruptenablecontrolbit intheUCR2registerisset.Thetwotransmitterinterruptconditionshavetheirowncorresponding enablecontrolbits,whilethetworeceiverinterruptconditionshaveasharedenablecontrolbit. TheseenablebitscanbeusedtomaskoutindividualUARTinterruptsources. Theaddressdetectcondition,whichisalsoaUARTinterruptsource,doesnothaveanassociated flag,butwillgenerateaUARTinterruptwhenanaddressdetectconditionoccursifitsfunction isenabledbysettingtheADDENbitintheUCR2register.AnRXpinwake-up,whichisalsoa UARTinterruptsource,doesnothaveanassociatedflag,butwillgenerateaUARTinterruptifthe microcontrolleriswokenupfromIDLE0orSLEEPmodebyafallingedgeontheRXpin,ifthe WAKEandRIEbitsintheUCR2registerareset.NotethatintheeventofanRXwake-upinterrupt occurring,therewillbeacertainperiodofdelay,commonlyknownastheSystemStart-upTime,for theoscillatortorestartandstabilizebeforethesystemresumesnormaloperation. NotethattheUSRregisterflagsarereadonlyandcannotbeclearedorsetbytheapplication program,neitherwilltheybeclearedwhentheprogramjumpstothecorrespondinginterrupt servicingroutine,asisthecaseforsomeoftheotherinterrupts.Theflagswillbecleared automaticallywhencertainactionsaretakenbytheUART,thedetailsofwhicharegiveninthe UARTregistersection.TheoverallUARTinterruptcanbedisabledorenabledbytherelated interruptenablecontrolbitsintheinterruptcontrolregistersofthemicrocontrollertodecidewhether theinterruptrequestedbytheUARTmoduleismaskedoutorallowed. T�ans�itte� E�pty Flag TXIF USR Registe� T�ans�itte� Idle Flag TIDLE Re�eive� Ove��un Flag OERR Re�eive� Data Availa�le RXIF ADDEN RX Pin Wake-up WAKE 0 1 0 1 0 1 RX7 if BNO=0 RX8 if BNO=1 UCR� Registe� OR RIE 0 1 TIIE 0 1 TEIE 0 1 UART Inte��upt Request Flag UIF UCR� Registe� UIE MFI1 Registe� MF1E INTC1 Registe� EMI INTC0 Registe� UART Interrupt Scheme |
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