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HT45F75 데이터시트(PDF) 18 Page - Holtek Semiconductor Inc |
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HT45F75 데이터시트(HTML) 18 Page - Holtek Semiconductor Inc |
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18 / 190 page ![]() Rev. 1.10 18 De�e��e� 1�� �01� Rev. 1.10 19 De�e��e� 1�� �01� HT45F75 Body Fat Scale Flash MCU HT45F75 Body Fat Scale Flash MCU Power-on Reset Characteristics Ta=�5°C Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions VPOR VDD Sta�t Voltage to Ensu�e Powe�-on Reset — — — — 100 �V RRVDD VDD Raising Rate to Ensu�e Powe�-on Reset — — 0.035 — — V/�s tPOR Mini�u� Ti�e fo� VDD Stays at VPOR to Ensu�e Powe�-on Reset — — 1 — — �s Ti me V DD V PO R RR VD D t PO R System Architecture Akeyfactorinthehigh-performancefeaturesoftheHoltekrangeofmicrocontrollersisattributedto theirinternalsystemarchitecture.Therangeofthedevicetakeadvantageoftheusualfeaturesfound withinRISCmicrocontrollersprovidingincreasedspeedofoperationandenhancedperformance. Thepipeliningschemeisimplementedinsuchawaythatinstructionfetchingandinstruction executionareoverlapped,henceinstructionsareeffectivelyexecutedinoneortwocyclesformost ofthestandardorextendedinstructionsrespectively.Theexceptionstothisarebranchorcall instructionswhichneedonemorecycle.An8-bitwideALUisusedinpracticallyallinstructionset operations,whichcarriesoutarithmeticoperations,logicoperations,rotation,increment,decrement, branchdecisions,etc.TheinternaldatapathissimplifiedbymovingdatathroughtheAccumulator andtheALU.CertaininternalregistersareimplementedintheDataMemoryandcanbedirectly orindirectlyaddressed.Thesimpleaddressingmethodsoftheseregistersalongwithadditional architecturalfeaturesensurethataminimumofexternalcomponentsisrequiredtoprovidea functionalI/OandA/Dcontrolsystemwithmaximumreliabilityandflexibility.Thismakesthe devicesuitableforlow-cost,high-volumeproductionforcontrollerapplications. Clocking and Pipelining Themainsystemclock,derivedfromeitheraHXT,LXT,HIRCorLIRCoscillatorissubdivided intofourinternallygeneratednon-overlappingclocks,T1~T4.TheProgramCounterisincremented atthebeginningoftheT1clockduringwhichtimeanewinstructionisfetched.Theremaining T2~T4clockscarryoutthedecodingandexecutionfunctions.Inthisway,oneT1~T4clock cycleformsoneinstructioncycle.Althoughthefetchingandexecutionofinstructionstakesplace inconsecutiveinstructioncycles,thepipeliningstructureofthemicrocontrollerensuresthat instructionsareeffectivelyexecutedinoneinstructioncycle.Theexceptiontothisareinstructions wherethecontentsoftheProgramCounterarechanged,suchassubroutinecallsorjumps,inwhich casetheinstructionwilltakeonemoreinstructioncycletoexecute. |
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