HT32F52231 datasheet(39/50 Pages) HOLTEK

39 / 50 page

Rev. 1.51

39 of 50

April 11, 2017

32-Bit ARM® Cortex™-M0+ MCU

HT32F52231/HT32F52241/HT32F52331/HT32F52341

ADC Characteristics

Table 21. ADC Characteristics

TA = 25°C, unless otherwise specified.

Symbol

Parameter

Conditions

Min Typ Max Unit

VDDA

Operating Voltage

—

2.5

3.3

3.6

VADCIN

A/D Converter Input Voltage Range

—

— VREF+

VREF+

A/D Converter Reference Voltage

—

— VDDA VDDA

IADC

Current Consumption

VDDA = 3.3V

—

TBD

IADC_DN

Power Down Current Consumption VDDA = 3.3V

—

0.1

μA

fADC

A/D Converter Clock

—

0.7

—

MHz

Sampling Rate

—

0.05 —

MHz

tDL

Data Latency

—

— 12.5 —

1/fADC

Cycles

tS&H

Sampling & Hold Time

—

3.5

—

1/fADC

Cycles

tADCCONV

A/D Converter Conversion Time

—

1/fADC

Cycles

Input Sampling Switch Resistance

—

kΩ

Input Sampling Capacitance

No pin/pad capacitance

included

—

tSU

Startup Up Time

—

μs

Resolution

—

bits

INL

Integral Non-linearity Error

fS = 750kHz, VDDA = 3.3V —

±2

±5

LSB

DNL

Differential Non-linearity Error

fS = 750kHz, VDDA = 3.3V —

±1

—

LSB

Offset Error

—

±10

LSB

Gain Error

—

±10

LSB

Note: 1. Guaranteed by design, not tested in production.

2. The figure below shows the equivalent circuit of the A/D Converter Sample-and-Hold input

stage where CI is the storage capacitor, RI is the resistance of the sampling switch and RS

is the output impedance of the signal source VS. Normally the sampling phase duration is

approximately, 3.5/fADC. The capacitance, CI, must be charged within this time frame and it

must be ensured that the voltage at its terminals becomes sufficiently close to VS for accu-

racy. To guarantee this, RS is not allowed to have an arbitrarily large value.

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