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HT69F360 데이터시트(PDF) 32 Page - Holtek Semiconductor Inc |
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HT69F360 데이터시트(HTML) 32 Page - Holtek Semiconductor Inc |
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32 / 235 page ![]() Rev. 1.30 3� �ove��e� 1�� �01� Rev. 1.30 33 �ove��e� 1�� �01� HT69F340/HT69F350/HT69F360 TinyPowerTM I/O Flash MCU with LCD & EEPROM HT69F340/HT69F350/HT69F360 TinyPowerTM I/O Flash MCU with LCD & EEPROM Power on Reset Electrical Characteristics Ta=�5°C Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions VPOR VDD Sta�t Voltage to Ensu�e Powe�-on Reset — — — — 100 �V RRPOR VDD Rising Rate to Ensu�e Powe�-on Reset — — 0.035 — — V/�s tPOR Mini�u� Ti�e fo� VDD Stays at VPOR to Ensu�e Powe�-on Reset — — 1 — — �s Ti me V DD V PO R RR PO R t PO R System Architecture Akeyfactorinthehigh-performancefeaturesoftheHoltekrangeofmicrocontrollersisattributed totheirinternalsystemarchitecture.Theseriesofdevicestakeadvantageoftheusualfeaturesfound withinRISCmicrocontrollersprovidingincreasedspeedofoperationandPeriodicperformance.The pipeliningschemeisimplementedinsuchawaythatinstructionfetchingandinstructionexecution areoverlapped,henceinstructionsareeffectivelyexecutedinonecycle,withtheexceptionofbranch orcallinstructions.An8-bitwideALUisusedinpracticallyallinstructionsetoperations,which carriesoutarithmeticoperations,logicoperations,rotation,increment,decrement,branchdecisions, etc.TheinternaldatapathissimplifiedbymovingdatathroughtheAccumulatorandtheALU. CertaininternalregistersareimplementedintheDataMemoryandcanbedirectlyorindirectly addressed.Thesimpleaddressingmethodsoftheseregistersalongwithadditionalarchitectural featuresensurethataminimumofexternalcomponentsisrequiredtoprovideafunctionalI/O controlsystemwithmaximumreliabilityandflexibility.Thismakesthedevicessuitableforlow- cost,high-volumeproductionforcontrollerapplications. Clocking and Pipelining Themainsystemclock,derivedfromeitheraHXT,LXT,HIRCorLIRCoscillatorissubdivided intofourinternallygeneratednon-overlappingclocks,T1~T4.TheProgramCounterisincremented atthebeginningoftheT1clockduringwhichtimeanewinstructionisfetched.Theremaining T2~T4clockscarryoutthedecodingandexecutionfunctions.Inthisway,oneT1~T4clock cycleformsoneinstructioncycle.Althoughthefetchingandexecutionofinstructionstakesplace inconsecutiveinstructioncycles,thepipeliningstructureofthemicrocontrollerensuresthat instructionsareeffectivelyexecutedinoneinstructioncycle.Theexceptiontothisareinstructions wherethecontentsoftheProgramCounterarechanged,suchassubroutinecallsorjumps,inwhich casetheinstructionwilltakeonemoreinstructioncycletoexecute. |
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