R5F104LEG datasheet(61/213 Pages) RENESAS

61 / 213 page

RL78/G14

2. ELECTRICAL SPECIFICATIONS (TA = -40 to +85

°C)

R01DS0053EJ0330 Rev. 3.30

Page 61 of 208

Aug 12, 2016

Remark

Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the port pins.

(TA = -40 to +85°C, 1.6 V

≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V)

(5/5)

Items

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

Input leakage cur-

rent, high

ILIH1

P00 to P06, P10 to P17, P30,

P31, P40 to P47, P50 to P57,

P64 to P67, P70 to P77,

P80 to P87, P100 to P102, P110,

P111, P120, P140 to P147

VI = EVDD0

μA

ILIH2

P20 to P27, P137, P150 to P156,

RESET

VI = VDD

μA

ILIH3

P121 to P124

(X1, X2, EXCLK, XT1, XT2,

EXCLKS)

VI = VDD

In input port or

external clock

input

μA

In resonator con-

nection

μA

Input leakage

current, low

ILIL1

P00 to P06, P10 to P17, P30,

P31, P40 to P47, P50 to P57,

P64 to P67, P70 to P77,

P80 to P87, P100 to P102, P110,

P111, P120, P140 to P147

VI = EVSS0

-1

μA

ILIL2

P20 to P27, P137, P150 to P156,

RESET

VI = VSS

-1

μA

ILIL3

P121 to P124

(X1, X2, EXCLK, XT1, XT2,

EXCLKS)

VI = VSS

In input port or

external clock

input

-1

μA

In resonator con-

nection

-10

μA

On-chip pull-up

resistance

P00 to P06, P10 to P17, P30,

P31, P40 to P47, P50 to P57,

P64 to P67, P70 to P77,

P80 to P87, P100 to P102, P110,

P111, P120, P140 to P147

VI = EVSS0, In input port

100

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