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VL53L0CXV0DH/1 데이터시트(PDF) 21 Page - STMicroelectronics |
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VL53L0CXV0DH/1 데이터시트(HTML) 21 Page - STMicroelectronics |
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21 / 40 page ![]() DocID029104 Rev 1 21/40 VL53L0X Control interface 37 Figure 19. I2C timing characteristics All timings are measured from either VIL or VIH. 3.2 I2C interface - reference registers The registers shown in the table below can be used to validate the user I2C interface. Note: I2C read/writes can be 8,16 or 32-bit. Multi-byte reads/writes are always addressed in ascending order with MSB first as shown in Table 5. SDA SCL tHD.STA tR tHIGH tF tSU.DAT tHD.DAT tSU.STA tSU.STO ... ... tHD.STA tLOW tBUF stop start stop start VIH VIL VIH VIL Table 4. Reference registers Address (after fresh reset, without API loaded) 0xC0 0xEE 0xC1 0xAA 0xC2 0x10 0x51 0x0099 0x61 0x0000 Table 5. 32-bit register example Register address Byte Address MSB Address + 1 .. Address + 2 .. Address + 3 LSB |
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