HT82K95EE/HT82K95AE

Rev. 1.50

17

April 13, 2012

Low Voltage Reset

- LVR

The microcontroller contains a low voltage reset circuit

in order to monitor the supply voltage of the device. If the

supply voltage of the device drops to within a range of

tery, the LVR will automatically reset the device inter-

nally.

The LVR includes the following specifications:

than 1ms. If the low voltage state does not exceed

1ms, the LVR will ignore it and do not perform a reset

function.

²OR² function with the external

RES signal to perform chip reset.

operation at 4MHz system clock.

Data EEPROM Functional Description

The SCL input is used for positive edge clock data into

each EEPROM device and negative edge clock data

out of each device.

The SDA pin is bidirectional for serial data transfer.

The pin is open-drain driven and may be wired-OR

with any number of other open-drain or open collector

devices.

Memory Organization

Internally organized with 128 8-bit words, the 1K re-

quires an 8-bit data word address for random word ad-

dressing.

Device Operations

Data transfer may be initiated only when the bus is not

busy. During data transfer, the data line must remain

stable whenever the clock line is high. Changes in

data line while the clock line is high will be interpreted

as a START or STOP condition.

A high-to-low transition of SDA with SCL high is a start

condition which must precede any other command

(refer to Start and Stop Definition Timing diagram).

A low-to-high transition of SDA with SCL high is a stop

condition. After a read sequence, the stop command

will place the EEPROM in a standby power mode (re-

fer to Start and Stop Definition Timing Diagram).

5 . 5 V

3 . 3 V

3 . 0 V

0 . 9 V

5 . 5 V

5 . 5 V

0 . 9 V

0 V

R e s e t S i g n a l

R e s e t

* 1

* 2

N o r m a l O p e r a t i o n

R e s e t

L V R D e t e c t V o l t a g e

Low Voltage Reset

Note: *1. To make sure that the system oscillator has stabilized, the SST provides an extra delay of 1024 system

clock pulses before entering the normal operation.

*2. Since low voltage has to be maintained for over 1ms in its original state, therefore there

¢s a 1ms delay

before entering the reset mode