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Copyright 2008 Cirrus Logic, Inc.

DS868PP2

CS49DV8C Data Sheet

32-bit Audio DSP Family

5.13 Switching Characteristics — UART

Figure 7. UART Timing

Parameter

Symbol

Min

Max

Unit

1. The minimum clock period is limited to DCLKP/32 or the minimum value, whichever is larger.

266

-

ns

UART_CLK duty cycle

-

40

60

%

Setup time for UART_RXD

5-

Hold time for UART_RXD

5-

ns

Delay from CLK transition to TXD transition

-29

ns

UART_CLK

UART_RXD

UART_TXD

UART_TX_EN