6

DS1072PP1

CS7250B

3 Characteristics and Specifications

Table 3-4. Acoustic and Electrical Characteristics

Test conditions (unless specified otherwise):

1.Performance measurements are specified with a low-pass brick-wall filter and, where noted, an A-weighted filter. The low-pass filter removes

out-of-band noise. The Low Power Mode is measured with a cut-off frequency of 8 kHz; all other measurements are with a 20 kHz cut-off frequency.

Min

Typ

Max

Units

General characteristics

Directivity

Omnidirectional

—

Polarity

Positive sound pressure

Increasing density of 1s

—

2.Sensitivity is measured at production test 0.9 s after power up.

–37

–36

–35

dBFS

High Performance Mode

(CLK = 3.072 MHz)

Acoustic overload

THD < 10%

—

131

—

dB SPL

THD

94 dB SPL

125 dB SPL

—

—

0.2

1

—

—

%

%

SNR

A-weighted

—

66

—

dB

DR

A-weighted

—

103

—

dB

Acoustic noise floor

A-weighted

—

28

—

dB SPL

Electrical noise floor

A-weighted

—

–102

—

dBFS

PSR (with respect to VDD)

100 mV p-p, swept sine wave,

20 Hz–20 kHz, A-weighted

—

–90

—

dBFS

Low Power Mode

(CLK = 768 kHz)

Acoustic overload

THD < 10%

—

120

—

dB SPL

THD

117 dB SPL

—

1

—

%

SNR

20Hz–8kHz, A-weighted

—

62

—

dB

DR

20 Hz–8 kHz, A-weighted

—

88

—

dB

Acoustic noise floor

20 Hz–8 kHz, A-weighted

—

32

—

dB SPL

Electrical noise floor

20 Hz–8 kHz, A-weighted

—

–98

—

dBFS

PSR (with respect to VDD)

100 mV p-p, swept sine wave,

20 Hz–8 kHz, A-weighted

—

–90

—

dBFS

Frequency response

Frequency response

–3 dB low frequency

+3 dB high frequency

—

—

35

13

—

—

Hz

kHz

Frequency response flatness

200 Hz–8 kHz

–1

—

+1

dB

3.Note that digital input pins should not be left unconnected or floating.

Input HIGH Level

0.65

VDD

—

—

V

Input LOW Level

—

—

0.35

VDD

V

Output HIGH Level

—

—

V

Output LOW Level

—

—

0.1

VDD

V

Input capacitance

—

3

5

pF

Input leakage

–1

—

1

A

Load capacitance (DATA)

—

—

200

pF

Miscellaneous

characteristics

4.Measured without a load on the DATA pin.

High Performance Mode, CLK = 3.072 MHz

Low Power Mode, CLK = 768 kHz

Standby Mode, CLK = 0 Hz

—

—

—

650

160

5

—

—

10

A

A

A

Startup time

From power applied to output within 0.5 dB

of sensitivity specification

—15—

ms

Mode-transition time

From Low Power Mode to High

Performance Mode

—10—

ms

5.High Performance and Low Power Modes are selected according to the CLK frequency.

6.Standby Mode is selected when the CLK input is stopped; this is a power-saving mode. Normal operation resumes automatically when the CLK input

frequency is within the specified operational limits. Note that the VDD supply is still required in Standby Mode.

High Performance Mode

Low Power Mode

Standby Mode

1.4

300

—

—

—

0

3.2

800

—

MHz

kHz

Hz