| 전자부품 데이터시트 검색엔진 |
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FPD87208AXAVS 데이터시트(PDF) 6 Page - National Semiconductor (TI) |
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FPD87208AXAVS 데이터시트(HTML) 6 Page - National Semiconductor (TI) |
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6 / 20 page ![]() AC Electrical Characteristics T A = 0˚C to 70˚C, VDD = 2.5V ±0.25V, IPI = 100 µA (Unless otherwise specified) LVDS Data Input Symbol Parameter Conditions Min Max Units F RXCLK RxCLK Frequency (LVDS) 25 85 MHz RPLLS FPD-Link Receiver Phase Lock Loop Wake-Up Time 10 ms RMS RxIN Strobe Margin (Note 2) and (Figure 7) F = 85 MHz 400 ps Note 2: Receiver Strobe Margin is defined as the valid data sampling region at the receiver inputs. 20101407 FIGURE 7. FPD-Link Receiver Input Skew Margin www.national.com 6 |
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