HT49R30A-1/HT49C30-1/HT49C30L

Rev. 1.10

21

September 25, 2002

C O M 0

C O M 1

C O M 2

C O M 3

L C D s e g m e n t s O N

C O M 2 s i d e l i g h t e d

V A

V B

V C

V S S

V S S

V S S

V S S

V S S

V A

V B

V C

V A

V B

V C

V A

V B

V C

V A

V B

V C

N o t e : 1 / 4 d u t y , 1 / 3 b i a s , C t y p e : " V A " 3 / 2 V L C D , " V B " V L C D , " V C " 1 / 2 V L C D

1 / 4 d u t y , 1 / 3 b i a s , R t y p e : " V A " V L C D , " V B " 2 / 3 V L C D , " V C " 1 / 3 V L C D

1 / 3 b i a s o n l y f o r H T 4 9 R 3 0 A - 1 / H T 4 9 C 3 0 - 1

LCD driver output

Low voltage reset/detector functions for

HT49R30A-1/HT49C30-1

There is a low voltage detector (LVD) and a low voltage

reset circuit (LVR) implemented in the microcontroller.

These two functions can be enabled/disabled by op-

tions. Once the options of LVD is enabled, the user can

use the RTCC.3 to enable/disable (1/0) the LVD circuit

and read the LVD detector status (0/1) from RTCC.5;

otherwise, the LVD function is disabled.

The LVR has the same effect or function with the exter-

nal RES signal which performs chip reset. During HALT

state, LVR is disabled.

The definitions of RTCC register are listed in the follow-

ing table.

Register

Bit No.

Label

Read/Write

Reset

Function

RTCC

(09H)

0~2

RT0~RT2

R/W

111B

8 to 1 multiplexer control inputs to select the real

clock prescaler output

3

LVDC*

R/W

0

LVD enable/disable (1/0)

4

QOSC

R/W

0

32768Hz OSC quick start-up oscillating

0/1: quickly/slowly start

5

LVDO*

R

0

LVD detection output (1/0)

1: low voltage detected

6~7

¾¾

¾

Unused bit, read as

²0²

Note:

²*² For HT49R30A-1/HT49C30-1