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ICS511-DWF 데이터시트(PDF) 2 Page - Integrated Circuit Systems

부품명 ICS511-DWF
상세설명  LOCO PLL CLOCK MULTIPLIER
PDF  8 Pages
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제조업체  ICST [Integrated Circuit Systems]
홈페이지  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS511-DWF 데이터시트(HTML) 2 Page - Integrated Circuit Systems

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LOCOTM PLL Clock Multiplier
MDS 511 G
2
Revision 102504
In te gr ated Circuit Systems 525 Ra ce Street, San Jose, CA 9512 6 tel (4 08) 297 -1 201 www.icst.com
ICS511
Pin Assignment
Clock Output Table
0 = connect directly to ground
1 = connect directly to VDD
M = leave unconnected (floating)
Common Output Frequency Examples (MHz)
Pin Descriptions
X1/ I CLK
VDD
GND
OE
S1
S0
CLK
X2
1
2
3
4
8
7
6
5
8 Pi n ( 150 mil) SOIC
S1
S0
CLK
0
0
4X input
0
M
5.333X input
0
1
5X input
M
0
2.5X input
M
M
2X input
M
1
3.333X input
1
0
6X input
1
M
3X input
1
1
8X input
Output
20
24
30
32
33.33
37.5
40
48
50
60
64
Input
10
12
10
16
16.66
15
10
12
20
10
16
Selection (S1, S0)
M, M
M, M
1, M
M, M
M, M
M, 0
0, 0
0, 0
M, 0
1, 0
0, 0
Output
66.66
72
75
80
83.33
90
100
120
125
133.3
150
Input
20
12
25
10
25
15
20
15
25
25
25
Selection (S1, S0)
M, 1
1, 0
1, M
1, 1
M, 1
1, 0
0, 1
1, 1
0, 1
0, M
1, 0
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
XI/ICLK
Input
Crystal connection or clock input.
2
VDD
Power
Connect to +3.3 V or +5 V.
3
GND
Power
Connect to ground.
4
S1
Tri-level Iinput
Select 1 for output clock. Connect to GND or VDD or float.
5
CLK
Output
Clock output per table above.
6
S0
Tri-level Input
Select 0 for output clock. Connect to GND or VDD or float.
7
OE
Input
Output enable. Tri-states CLK output when low. Internal pull-up
resistor.
8
X2
Output
Crystal connection. Leave unconnected for clock input.



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