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RT4832AWSC 데이터시트(PDF) 16 Page - Richtek Technology Corporation |
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RT4832AWSC 데이터시트(HTML) 16 Page - Richtek Technology Corporation |
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16 / 26 page ![]() RT4832A Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS4832A-00 January 2017 16 Application Information I 2C S 0 0 1 0 0 0 1 0 R/W A P I2C Write Control Slave ID Data Address S 0 0 1 0 0 0 1 0 R/W A I2C Read Control Slave ID Data Address A ACK from Slave ACK from Slave ACK from Slave Write Data1 A ACK from Slave A Read Data1 ACK from Master A P NACK from Master Read Data2 A A 0 0 1 0 0 0 1 1 ACK from Slave ACK from Slave R/W Slave ID P P Write Data2 A ACK from Slave DSV The RT4832A provides programmable LCMOUT, POS, CPOUT value. Table 1 contains the detail for DSV operation setting. The LCMOUT should be selected to provide enough headroom for good ripple and load transient performance. The headroom voltage between LCMOUT and the maximum value of VPOS and |VCPOUT| should be higher than 150mV for good performance but the headroom voltage between LCMOUT and |VCPOUT| should not be higher than 200mV to avoid the larger ripple at VCPOUT. The OCP level of POS is 250mA and CPOUT is 150mA typically. Table 1. DSV Operation Setting Channel Range Step Register Default Value Suggest Setting LCMOUT 4V to 6.15V 50mV/LSB 0x0D[5:0] 6V 5.7V VPOS 4V to 6V 50mV/LSB 0x0E[5:0] 5.5V 5.5V CPOUT 4V to 6V 50mV/LSB 0x0F[5:0] 5.4V 5.5V The DSV con be controlled either by pins or register bits. Table 2 is the DSV operation control table. Table 2. DSV Operation Control Table EN pin ENP pin ENM pin Dsv_ext_en 0x09[5] DSV_vpos_en 0x0C[6] DSV_vneg_en 0x0C[3] Status 0 X X X X X Shutdown 1 X X 0 0 0 Standby 1 0 0 1 X X Standby 1 X X 0 1 0 VPOS enable 1 X X 0 0 1 VNEG enable 1 X X 0 1 1 VPOS & VNEG enable 1 1 0 1 X X VPOS enable 1 0 1 1 X X VNEG enable 1 1 1 1 X X VPOS & VNEG enable |
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