2

DSP56302 and DSP56309 Functional Differences

3

Input Power Changes

One method to increase the operating frequency of an integrated circuit is to “shrink” the die (that is,

reduce the die dimensions, both linearly and vertically). Reducing the die size can yield additional benefits,

such as a reduction of power consumption, but can also result in other functional changes. The DSP56309

is a “shrink” of the DSP56302. This die size reduction enables the DSP56309 to achieve higher operating

frequencies. Decreasing the die size, however, requires a reduction of the thickness of the oxide dielectrics,

which also reduces the maximum allowable voltages across some oxides within the die. To support future

“shrinks” of the DSP56309 while maximizing system level compatibility, Motorola has elected to separate

the power supply networks on the die. This split allows the I/O pins to operate over a voltage range which

is different from that used by the core digital logic. Although the initial release of this product specifies the

same voltage ranges for the I/O pins and the core logic, future versions of the DSP56309 or its derivatives

I/O levels use a higher level (for example, 3.3 V). This allows Motorola to continue aggressively to

“shrink” the device, while preserving the ability to maintain system level compatibility.

The split-power design requires a modification in the chip pinout. A top view of the DSP56309 TQFP

package is shown in Figure 1. Table 2 lists the pin differences between the DSP56302 and the DSP56309.

Note:

external input power supply.

Table 1. Functional Comparison of DSP56302 and DSP56309

Feature

DSP56302

DSP56309

Operating

frequency

≤ 66 MHz down to 0 Hz

≤ 100 MHz down to 0 Hz

Technology

0.5 micron

Sub 0.4 micron

Input power

and ground

Split power:

A pinout change is required to support the split

power configuration. See Section 3 for more

information and a description of the pinout

change for the 144-pin TQFP package.

I/O pins

5 V tolerant (exceptions: see data sheet)

Tolerant up to 3.6 V

Package

144-pin TQFP

144-pin TQFP or 196-pin PBGA

PLL input

capacitor

Uses the following rules:

For MF

≤ 4:

For MF > 4:

Uses the following rules:

For MF

≤ 4:

For MF > 4:

Operating

modes

See Table 3 for details.

Other

functionality

All memory, control functions, and peripherals are identical. Refer to the

DSP56309 Technical

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com