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S89430 데이터시트(PDF) 12 Page - Seiko Instruments Inc |
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S89430 데이터시트(HTML) 12 Page - Seiko Instruments Inc |
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12 / 33 page ![]() MINI ANALOG SERIES 0.5 μA Rail-to-Rail CMOS OPERATIONAL AMPLIFIER S-89430/89431 Series Rev.2.1_01 12 3. Common-mode input signal rejection ratio, common-mode input voltage range RF RS RS RF + − VOUT VDD VIN VDD / 2 • Common-mode input signal rejection ratio (CMRR) The common-mode input signal rejection ratio (CMRR) can be calculated by the following expression, with VOUT measured at each VIN. Test conditions: When VIN = VCMR Max.: VIN = VIN1, VOUT = VOUT1, When VIN = VCMR Min.: VIN = VIN2, VOUT = VOUT2 CMRR = 20 log VIN1 − VIN2 VOUT1 − VOUT2 × RF + RS RS • Common-mode input voltage range (VCMR) The common-mode input voltage range is the range of VIN in which VOUT satisfies the common-mode input signal rejection ratio specifications. Figure 10 4. Maximum output swing voltage (VOH) + − VOH VDD VIN1 VIN2 RL VDD / 2 • Maximum output swing voltage (VOH) Test conditions: VIN1 = VDD 2 − 0.1 V VIN2 = VDD 2 + 0.1 V RL = 100 k Ω Figure 11 5. Maximum output swing voltage (VOL) + − VOL VDD VIN1 VIN2 RL VDD / 2 • Maximum output swing voltage (VOL) Test conditions: VIN1 = VDD 2 + 0.1 V VIN2 = VDD 2 − 0.1 V RL = 100 k Ω Figure 12 |
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