MDS 1526 I

4

Revision 020304

Integrated Circuit Systems, 525 Race Street, San Jose, CA 95126, tel (408) 297-1201

www.icst.com

Section 2 Pin Descriptions

ICS1526 Preliminary Data Sheet

Section 2 Pin Descriptions

Notes: 1. These LVTTL inputs are 5 V tolerant.

2. Connect to ground if unused.

Table 2-1

PIN NO. PIN NAME

TYPE

DESCRIPTION

COMMENTS

Notes

1

VSSD

POWER

Digital ground

2SDA

IN/OUT

Serial data

1

3SCL

IN

Serial clock

1

4

VSYNC

IN

Vertical sync

1 & 2

5HSYNC

IN

Horizontal sync

Clock input to PLL

1 & 2

6VDDA

POWER

Analog supply

Power for analog circuitry

7

VSSA

POWER

Analog ground

Ground for analog circuitry

8OSC

IN

Oscillator

Input from crystal oscillator package

1 & 2

9I2CADR

IN

10

LOCK

LVCMOS

OUT

Lock

PLL Lock detect

11

HSYNC_out

LVCMOS

OUT

HSYNC output

Schmitt-trigger filtered HSYNC

realigned with the output pixel clock

12

CLK

LVCMOS

OUT

Pixel clock output

LVCMOS driver for full speed clock

13

VDDQ

POWER

Output driver supply

Power for output drivers

14

VSYNC_out

LVCMOS

OUT

VSYNC output

Schmitt-trigger filtered VSYNC

realigned with the output pixel clock

15

VSSQ

POWER

Output driver ground

Ground for output drivers

16

VDDD

POWER

Digital supply

Power for digital sections