RT9833

2

DS9833-00 May 2013

www.richtek.com

©

Copyright 2013 Richtek Technology Corporation. All rights reserved.

is a registered trademark of Richtek Technology Corporation.

Function Block Diagram

Functional Pin Description

Pin No.

Pin Name

Pin Function

1

GND

Ground.

RESET

Active Low Open Drain Reset Output.

2

RESET

Active High Open Drain Reset Output.

3

MR

Manual Reset.

4

VDD

Power.

VSET

The VSET generates a fixed threshold voltage.

CMP

Voltage Comparator which compares the voltage difference

between threshold voltage and VDD.

POR

Power on reset. It will set all digital logic to the right state

when power on.

Timer

VSET

Threshold

Voltage Setting

POR

Power On Reset

CMP

N MOS

GND

VDD

MR

RESET/

RESET

Pin Configurations

(TOP VIEW)

SC-82

VDD

GND

3

2

4

RESET/

RESET

MR

Operation

When VDD is lower than threshold voltage set by VSET

circuit, the RESET output becomes high. If VDD remains

higher than the threshold voltage with a hysteresis voltage,

Timer will be active. After a specific delay time, the RESET

output becomes low. There is an internal pull-high resistor

connected to the MR pin. MR resets the RT9833 only

when it is pulled low. When MR releases and waits for a

delay time, output returns to its normal state related to

VDD. It is an open drain output type of Reset IC.

Timer

The Timer provides four kinds of delay time options

including 0ms, 55ms, 220ms, and 450ms.