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SN74LVC2G38 데이터시트(PDF) 6 Page - Texas Instruments

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부품명 SN74LVC2G38
상세설명  DUAL 2 INPUT NAND GATE WITH OPEN DRAIN OUTPUT
PDF  11 Pages
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
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SN74LVC2G38
DUAL 2INPUT NAND GATE
WITH OPEN DRAIN OUTPUT
SCES554A − MARCH 2004 − REVISED OCTOBER 2004
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
(OPEN DRAIN)
VM
th
tsu
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
S1
VLOAD
Open
GND
RL
RL
Data Input
Timing Input
VI
0 V
VI
0 V
0 V
tw
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
VI
0 V
Input
Output
Waveform 1
S1 at VLOAD
(see Note B)
Output
Waveform 2
S1 at VLOAD
(see Note B)
VOL
tPZL
tPZH
tPLZ
tPHZ
VLOAD/2
0 V
VOL + V∆
VLOAD/2 − V∆
≈0 V
VI
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time, with one transition per measurement.
E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd.
F. tPZL is measured at VM.
G. tPLZ is measured at VOL + V∆.
H. All parameters and waveforms are not applicable to all devices.
Output
Control
VM
VM
VM
VM
VM
VM
VM
VM
VM
VM
VM
VM
VI
VM
VM
1.8 V
± 0.15 V
2.5 V
± 0.2 V
3.3 V
± 0.3 V
5 V
± 0.5 V
1 k
500
500
500
VCC
RL
2
× VCC
2
× VCC
6 V
2
× VCC
VLOAD
CL
30 pF
30 pF
50 pF
50 pF
0.15 V
0.15 V
0.3 V
0.3 V
V∆
VCC
VCC
3 V
VCC
VI
VCC/2
VCC/2
1.5 V
VCC/2
VM
tr/tf
≤ 2 ns
≤ 2 ns
≤ 2.5 ns
≤ 2.5 ns
INPUT
tPZL (see Notes E and F)
tPLZ (see Notes E and G)
tPHZ/tPZH
VLOAD
VLOAD
VLOAD
TEST
S1
VLOAD/2
Figure 2. Load Circuit and Voltage Waveforms



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