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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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LM98503 데이터시트(PDF) 7 Page - National Semiconductor (TI) |
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LM98503 데이터시트(HTML) 7 Page - National Semiconductor (TI) |
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7 / 25 page  www.national.com 7 Correlated Double Sampler Specifications The following specifications apply for DV+ = AV+ = DV+ I/O = +3.0V, CL = 10pF, and fCLK = 18MHz unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25 oC (Note 7) PGA Specifications The following specifications apply for DV+ = AV+ = DV+ I/O = +3.0V, CL = 10pF, and fCLK = 18MHz unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25 oC (Note 7) Offset DAC and Black Level Clamp Specifications The following specifications apply for DV+ = AV+ = DV+ I/O = +3.0V, CL = 10pF, and fCLK = 18MHz unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25 oC (Note 7) Symbol Parameter Conditions Min (note 9) Typical (note 8) Max (note 9) Units VIN Input Voltage Level 1.0 Vp-p IIN Input Leakage Current 5 nA CIN Input Capacitance 5 pF RIN Input Resistance 10 k Ω tAD Aperture Delay 2 ns tSHP CLK falling edge to SHP falling edge 10 tSHD CLK rising edge to SHD falling edge 14 Symbol Parameter Conditions Min (note 9) Typical (note 8) Max (note 9) Units Gain Resolution 8 Bits Step Size (Gain / Resolution) 0.125 dB Maximum Gain 32.0 dB Minimum Gain 0.0 dB Gain Error @ 20MHz Deviation from best-fit line after end- point correction ±5% Symbol Parameter Conditions Min (note 9) Typical (note 8) Max (note 9) Units RREF Reference Ladder Resistance 50 k Ω Resolution ±7Bits Offset Adjustment Range PGA Gain = 1.0 ±54 mV Black Level Clamp Accuracy PGA Gain = 0.0dB PGA Gain = 32.0dB ±.5 ±.5 LSB LSB tBLKCLP Black Clamp Switch Pulse Width 20 TCLK |
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